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AExE0104 Semiconductor devices

Semiconductor diode

A PN junction forms a depletion region and a built-in potential barrier.

Bias Depletion region Idealized behavior
Forward Narrows Significant current after the knee
Reverse Widens Tiny leakage until breakdown

The diode current is nonlinear and approximately exponential:

\[ I_D=I_S\left(e^{V_D/(nV_T)}-1\right). \]

For quick circuit work, a conducting silicon diode is often approximated by a \(0.7\ \text{V}\) drop, but this is not a universal constant. Forward voltage depends on current, temperature, material, and device construction. A reverse voltage beyond the rated breakdown can damage an ordinary diode; a Zener diode is designed to operate in a specified reverse-breakdown region with current limiting.

Diode recognition: passive, nonlinear, and unilateral.

BJT regions and bias

For an NPN transistor:

Region Base-emitter junction Base-collector junction Main use
Cutoff Not forward biased Reverse biased Open switch
Forward active Forward biased Reverse biased Linear amplification
Saturation Forward biased Forward biased Closed switch

In the forward-active approximation,

\[ I_C\approx\beta I_B, \qquad I_E=I_C+I_B. \]

\(\beta\) varies significantly with device, current, and temperature, so robust bias circuits should not rely on one exact value.

Bias establishes the DC operating condition. The Q-point is the quiescent operating point: the voltages and currents when the input signal is zero. For undistorted Class A operation, the signal should move around a Q-point that keeps the transistor in the active region and away from cutoff and saturation.

BJT configurations

Configuration Main characteristics Typical recognition
Common emitter (CE) Current and voltage gain; output voltage inverted General voltage/power gain
Common collector (CC) Voltage gain near 1; high input and low output impedance Emitter follower/buffer
Common base (CB) Current gain \(\alpha<1\); low input impedance; good high-frequency response RF, low-impedance input

Small-signal and large-signal models

  • Large-signal analysis uses the full nonlinear device behavior and can follow movement among cutoff, active, and saturation.
  • Small-signal analysis linearizes incremental changes around a fixed Q-point.
  • A transistor is approximately linear only for a sufficiently small excursion around a suitable active-region Q-point.
  • Small-signal variables are changes such as \(v_{be}\) and \(i_c\) superimposed on DC bias values such as \(V_{BEQ}\) and \(I_{CQ}\).

This is why "around the Q-point with a small signal" is the decisive phrase for linear transistor operation.

MOSFET principle and regions

An insulated gate controls channel charge electrostatically. Ideally, no steady gate current flows, but the gate capacitance must be charged and discharged during switching.

For an ideal long-channel enhancement NMOS, let \(V_{OV}=V_{GS}-V_T\):

Region Condition Ideal square-law behavior
Cutoff \(V_{GS}\le V_T\) \(I_D\approx0\)
Triode/ohmic/linear \(V_{GS}>V_T\), \(0\le V_{DS}<V_{OV}\) \(I_D=k[(V_{OV})V_{DS}-V_{DS}^2/2]\)
Saturation \(V_{GS}>V_T\), \(V_{DS}\ge V_{OV}\) \(I_D=kV_{OV}^2/2\)

Idealized enhancement NMOS output regions

The figure omits channel-length modulation and other short-channel effects. Real saturation curves therefore have some slope.

Critical vocabulary:

  • Triode, ohmic, and linear name the same low-\(V_{DS}\) MOSFET region.
  • MOSFET saturation is the usual analog-amplifier region.
  • BJT saturation is the strongly-on switch region. The same word does not mean the same junction condition.

Enhancement, depletion, and CMOS

Term Meaning at \(V_{GS}=0\) Gate action
Enhancement MOSFET Normally off Gate voltage creates/enhances a channel
Depletion MOSFET Normally on Opposite-polarity gate voltage depletes the channel

MOSFET names a transistor type. CMOS means complementary MOS: circuits use both NMOS and PMOS devices.

In a CMOS inverter:

  • input low: PMOS on, NMOS off, output high;
  • input high: PMOS off, NMOS on, output low;
  • ideally, one device is off in either steady logic state, giving very low static current;
  • real CMOS consumes leakage power, and switching consumes dynamic power roughly proportional to \(C_LV_{DD}^2f\).

Do not turn "CMOS has low static power" into "CMOS consumes no power."

Semiconductor example

For an enhancement NMOS with \(V_T=1\ \text{V}\) and \(V_{GS}=3\ \text{V}\), \(V_{OV}=2\ \text{V}\):

  • if \(V_{DS}=0.5\ \text{V}\), it is in the triode/ohmic region;
  • if \(V_{DS}=3\ \text{V}\), it is in saturation.

Semiconductor revision box

  • Silicon \(0.7\ \text{V}\) is an approximation, not a physical constant.
  • BJT active region amplifies; BJT saturation switches on.
  • Q-point means quiescent point.
  • Small signal means incremental linearization around the Q-point.
  • Enhancement MOSFET is normally off.
  • MOSFET low-\(V_{DS}\) region: triode = ohmic = linear.
  • CMOS uses complementary NMOS and PMOS; static power is low, not zero.