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AExE0202 Combinational and arithmetic circuits

Decoder, encoder, multiplexer, demultiplexer

Circuit Direction Main idea Typical size notation
Decoder \(n\) inputs to \(2^n\) outputs activates one output for a binary code 3-to-8, 4-to-16
Encoder many inputs to binary code outputs reports which input is active 8-to-3
Priority encoder many inputs to code outputs resolves simultaneous active inputs by priority 8-to-3 priority
Multiplexer many inputs to one output select one input line 4-to-1, 8-to-1
Demultiplexer one input to many outputs route one input to one selected output 1-to-4, 1-to-8

Recognition cues:

  • decoder expands a code;
  • encoder compresses active-line information into a code;
  • multiplexer is a data selector;
  • demultiplexer is a data distributor.

For an \(n\)-select-line multiplexer, the number of input lines is \(2^n\).

Arithmetic building blocks

Half adder and full adder

Circuit Inputs Sum Carry
Half adder \(A,B\) \(A\oplus B\) \(AB\)
Full adder \(A,B,C_{in}\) \(A\oplus B\oplus C_{in}\) \(AB + AC_{in} + BC_{in}\)
  • half adder does not include carry-in;
  • full adder includes carry-in and carry-out;
  • ripple-carry adders are simple but limited by carry propagation delay.

Binary subtraction

Direct subtraction building blocks:

Circuit Difference Borrow
Half subtractor \(A\oplus B\) \(\overline{A}B\)
Full subtractor uses \(A,B,B_{in}\) depends on both input borrow and bits

Practical hardware often reuses adders by adding the 2's complement of the subtrahend.

Unsigned and signed arithmetic

Unsigned rules:

  • carry-out indicates magnitude overflow beyond the fixed word size;
  • no sign interpretation is involved.

2's complement signed rules:

  • ignore final carry-out for the numeric result;
  • overflow when adding two positives gives a negative, or two negatives give a positive.

Quick examples:

  1. \(0101 + 0011 = 1000\) is valid unsigned \(5+3=8\).
  2. In 4-bit 2's complement, \(0101 + 0101 = 1010\) indicates overflow because positive plus positive became negative.

Arithmetic on signed numbers

Sign extension rule:

  • when widening a 2's complement number, copy the sign bit into new left bits;
  • sign extension preserves every widened 2's complement signed value;
  • zero extension preserves unsigned values and nonnegative signed values, but changes the value of a negative signed number.

MCQ cue: if the word grows from 8 bits to 16 bits and the stored value is signed negative, the added high bits are 1s.

Combinational implementation notes

Task Usual recognition block
Select one of many data inputs multiplexer
Convert binary code to one-hot line decoder
Convert active source line to binary code encoder
Arithmetic addition chain of full adders
Binary-to-decimal display driving decoder / code converter

Common distinctions:

  • a decoder may have enable inputs;
  • a priority encoder is needed if multiple input lines can be active together;
  • a MUX can realize logic functions by wiring inputs to constants or variables.

Combinational and arithmetic traps

  • Do not confuse a decoder with a demultiplexer. A demultiplexer has a data input; a decoder need not.
  • A 4-to-1 MUX has 2 select lines, not 4.
  • XOR gives the sum bit in half/full adder logic.
  • Borrow and carry are not the same concept.
  • Overflow and carry are different for signed arithmetic.

Arithmetic-circuit revision box

  • Decoder expands; encoder compresses.
  • MUX selects one input; DEMUX routes one input to one output.
  • Half adder: sum = XOR, carry = AND.
  • Full adder adds \(A\), \(B\), and \(C_{in}\).
  • Signed overflow is a sign test; unsigned overflow is a carry-width test.
  • Sign extension preserves signed value; zero extension preserves unsigned value.