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AExE0204 Microprocessor

Core microprocessor architecture

A microprocessor is a programmable CPU on a chip. It executes stored instructions on data using arithmetic, logic, control, and register resources.

Core blocks:

Block Function
ALU arithmetic and logical operations
Control unit instruction decode, sequencing, control signals
Register set very fast storage for operands, addresses, status
Buses transfer address, data, and control information

Three bus classes:

Bus Carries Direction cue
Address bus memory/I-O addresses usually processor to outside
Data bus operand and result data bidirectional in general
Control bus read, write, interrupt, timing, status mixed direction

Typical programmer-visible registers

Register Role
Accumulator primary arithmetic/logical operand register
Program counter (PC) address of next instruction
Stack pointer (SP) top of stack location
Instruction register current instruction being decoded
Flag/status register zero, carry, sign, overflow, parity, etc.
General-purpose registers temporary data/address storage

Architecture-specific detail warning: exact flag names and register counts depend on the processor family. The roles above are general.

Instruction cycle

High-level cycle:

  1. Fetch instruction from memory using PC.
  2. Increment or update PC.
  3. Decode opcode and addressing mode.
  4. Fetch operand if needed.
  5. Execute operation.
  6. Write back result and update flags.

Recognition cues:

  • opcode identifies the operation;
  • operand identifies data, register, or address;
  • machine cycle is a hardware transfer/execution unit;
  • instruction cycle may contain several machine cycles.

Addressing modes

Mode Meaning Recognition cue
Immediate constant is inside instruction fast literal operand
Register operand in register no memory operand fetch
Direct instruction gives memory address explicit address field
Register indirect register contains address pointer/register reference
Indexed / base-plus-offset address computed from register plus displacement arrays/tables
Implied operand is inherent in instruction accumulator-only style ops

Instruction classes

Class Examples of intent
Data transfer move, load, store, exchange
Arithmetic add, subtract, increment, decrement
Logical AND, OR, XOR, complement, compare
Branch / control transfer jump, call, return, conditional branch
Machine control nop, halt, enable/disable interrupt

Assembly language basics

Assembly language uses mnemonics for machine instructions.

Generic line form:

LABEL:  MNEMONIC  OPERAND1, OPERAND2   ; comment

Recognition points:

  • mnemonic names the operation;
  • assembler converts symbolic form to machine code;
  • label marks an addressable location;
  • directives such as DB, DW, ORG, or END are assembler controls, not CPU-executed instructions.

Example of architecture-neutral intent:

LOAD R1, #05h
ADD  R1, R2
STORE R1, RESULT

The exact mnemonic set depends on the processor, but load/add/store flow is universal.

Feature recognition

Common textbook microprocessor features:

  • serial execution of instructions unless the architecture explicitly supports pipelining or superscalar issue;
  • reliance on external memory and I-O devices;
  • software programmability;
  • interrupt support;
  • stack-based subroutine handling.

Do not confuse a microprocessor with a microcontroller:

  • microprocessor emphasizes CPU core and external support chips;
  • microcontroller typically integrates CPU, memory, timers, and peripherals on one chip.

Microprocessor traps

  • PC points to the next instruction to fetch, not a data result register.
  • Address bus width limits directly addressable space: with \(n\) address lines, address space is \(2^n\) locations.
  • Mnemonics are not portable across all processors even when the operation class is similar.

Microprocessor revision box

  • ALU computes; control unit sequences; registers hold fast state.
  • Address bus selects location; data bus carries data.
  • Instruction cycle = fetch, decode, operand fetch if needed, execute, write back.
  • Immediate mode carries a literal inside the instruction.
  • Assembly directives guide the assembler; they are not executed as instructions.
  • Microprocessor and microcontroller are not interchangeable terms.